World Vision's Marketing Strategy Case Study Example | Topics and Well Written Essays - 500 words

World Vision's Marketing Strategy - Case Study Example One central matter that can be seen for this situation is the advancement that has been applied in the showcasing in the congregation as the distributions, as these are the ones that can make individuals progressively mindful of the systems and objectives that World Vision has. Walker, (2008) state that in the event of the advertising methodology that has been utilized on the general New Zealand open isn't creative enough and it has neglected to draw in the crowd from the nation. Similar sorts of the advertising starategies have been utilized by the various foundation associations. The TV promotions need to cause the crowd to understand the reality of the neediness just as the revulsions that are related with it. The promotions have been utilizing the VIPs and this has been the most usually utilized system nowadays which has not been excessively successful. Bradley, (2005) says that so as to collect increasingly more cash and to acquire introduction there is an expanding requirement for the supporters particularly on account of the associations which are taking a shot at the singe

A Rose For Emily Theme Analysis Essay Example For Students

A Rose For Emily: Theme Analysis Essay In A Rose for Emily, William Faulkner utilizes a topic basic to huge numbers of his works. The changing of qualities and perspectives in southern culture. Miss Emily was naturally introduced to a family, the Griersons, that were set up in the network. She was supposed to be the last Greirson in this southern network. The family was not, at this point well off, however kept on being held in high regard after her dad kicked the bucket. The main material thing her dad left her was the family home. Miss Emily was left a poor person by her dads passing. Nonetheless, the most significant thing left her was the Grierson name and all that it spoke to in that town. The Grierson name passed on such regard on Miss Emily, that she was for all intents and purposes unapproachable by anything with the exception of her very own awful conditions. She got away from the results of neediness for all intents and purposes by being what her identity was. She was so secure in her own personality that she looked down and vanquished the city experts on the issue of making good on charges, alluding them to a man who had been dead ten years as the individual who knew about her circumstance. To abstain from being poor Emily after her sweetheart clearly wouldn't wed, she assumed control over issues buying Arsenic. She offered no clarification for its utilization despite the fact that the pharmacist disclosed to her that the clarification was legally necessary. At the point when an excruciating odor exuded from her property, the men sprinkled lime around the property to contain the smell yet approached no inquiries keeping in mind Miss Emily. The individuals of the town realized that there was one room in that district over the steps that most probable held an appalling mystery. Keeping in mind what her identity was or who she had been, the mystery was permitted to be covered up until she was conventionally in the ground.. Recompenses were made for Miss Emily that were not made for conventional individuals. Just a network of Colonel Sartoris age and thought would have permitted Miss Emily the priviledges she had in this story.

Wk 6 Homework Solutions Sample Essay

Wk 6 Homework Solutions Sample Essay There are questions for the sixth week of education that require searching for the answers or the homework solutions. Considering the questions and the answers provide an easier approach to the process of education. Start with the explanation of the work of the stable or automatic stabilisers. The next step is differentiating the regressive, progressive and relative income improvement that defines the stability of the economic system. Students can write such response as GDP influences the income improvement gross. In the case of the GDP growth, the same happens with the income rate. On the other hand, when there’s a lowering of GDP, the income rate represents slowing down or lowering the number of payments transfers. A continuous income raises influence the results and the outcome of the three income rate types and the stability of the regressive income rate. A progressive income rate is raising when there’s a proportional or regressive income raise as well. The GDP is an additional tool for raising the regressive income rate. This situation is used for eliminating the revenue. One can notice the opposite situation when the progressive income rate is lowering. Another task that students have to do during the sixth week of education is to explain the use of the financial policy to obtain and measure the work of the clip slowdowns. A student should find any possible reasons that can weaken the financial policy that can influence the income rate. Students should look for the consequences of crowding out and its approach to the financial policy. The next question for the sixth week is connected with the merge of the economic system. The students should define how the financial policy is connected with the jurisprudence and how it can influence the slowdown of the economic system. Students can explain that fiscal policy can become a handy tool for preventing any negative cases such as the unexpected rise of the prices. It can be influenced by the political representatives that are able to stabilise the whole system. Most often it happens before the elections when there’s a need to win the votes of the electors. If the case that is described above happens too often or every time there’s an election of a new candidate, the economic stability is questionable. The lowering of income rate can cause the consumer’s lost of costs. If the income of the household is cut, the disbursements are inevitable. Some may believe that the income rate will grow again, however, the households can search for alternative income rate growing schemes or expect the need to pay the revenue in the future. The sincere belief in the future raise of the income together with the interest rate, the households can change their expectations about the need to pay the increased interest rate. The results of the lowering of the investments can finish in lowering the involvement rates. The financial situation can be stabilised by borrowing some sums. For example, The G addition was increasing while the AD was lowering.

Human Body Continuously Need Blood Supply Essay - 965 Words

Human body continuously need blood supply to the cell in order to deliver oxygen and nutrient to the cells and carrying out carbon dioxide out of the cell. In order to have good perfusion in tissue, a person has to have good cardiac health and patent vessels. Edema also affect tissue perfusion. There are many reasons that disturbed the normal flow of blood like ECG rhythm, congestive heart failure, hypertension, gestational hypertension, mitral valve prolapse, coronary artery disease, and peripheral vascular disease, which are also the exemplars of perfusion. There are many risk factors that can be modified to prevent the perfusion problem. Blood pressure greater than 140/90 is known as hypertension. Excessive sodium intake, hyperlipidemia, obesity, diabetes, extreme tobacco and alcohol use, over activity of sympathetic nervous system, and over production of sodium retaining hormones and vasoconstriction substances are major contributing factors of hypertension. Heredity, age, and gender are also the risk factors for hypertension (Bucher Dirksen, 2014). Hypertension is one of the most underlying cause of impaired perfusion. High blood pressure for long period of time can shore up smooth muscles of artery as a result of building up the strength through hypertrophy and hyperplasia, which results in decrease size of arterial lumen. In older adult, the wall of artery become thick and hard due to above contributing factors that I mention. This alter vasomotor tone and bloodShow MoreRelatedHow Your Heart Works1102 Words   |  5 PagesHow Your Heart Works [pic] Your heart is a pump. It keeps blood moving around your body. The blood delivers oxygen and nutrients to all parts of your body, and carries away unwanted carbon dioxide and other waste products. The heart has four chambers -  two on the left side and two on the right. The two upper chambers are called the atria, and the two lower chambers are called the ventricles. The two sides of the heart are divided by a muscular wall called the septum. Each side of the heartRead MoreOrgan Trafficking : A Vital Part Of Our Survival Essay1179 Words   |  5 PagesE. Scott Denison Design 2110 12 October 2016 Organ Trafficking Throughout much of human history, trade has been a vital part of our survival. Trades take place continuously today; whether they’re in-person with a friend, or across the ocean with a complete stranger. There are many forms of trade, most including the buying and selling of goods and services to benefit us in some way. When we think about trade, body parts aren’t typically the first thing to pop into our heads. It is not in the foreseeableRead MoreBio/100 Appendix E Comparing Physiology Worksheet Essay1474 Words   |  6 Pagesrespiratory systems of sharks, iguanas, eagles, and humans. Answer each of the following questions in 25 to 50 words. Circulatory System * Shark * How would you describe the structure and function of this animal’s circulatory system? Include any unique characteristics. A shark’s heart is a two-chambered S-shaped tube, small in proportion to body size located in the head region. * How does this animal’s circulatory system work? The blood is pumped by the heart through the afferentRead MoreIs Ebola Only Deadly To The Poorest1134 Words   |  5 Pageshappens, patients get other infections and complications. Their blood pressure drops to dangerously low levels, they become dehydrated and malnourished, their kidneys no longer purify their blood so toxins build up in their bodies. Modern medicine can easily correct these problems through tools we take for granted in hospitals here: kidney dialysis, IV rehydration and antibiotics. But only if identified in the early stages. But you need good diagnostic tools to identify these problems in the firstRead MoreThe Stress Of The Blood Pressure1489 Words   |  6 Pagessit in a chair, relaxed while we took a set of vital signs. This situation was used as a means of calculating Adam’s resting vital signs. The average resting blood pressure is 120/80 mmHg, however Adam is showing a slightly higher resting blood pressure. Although his blood pressure is above average it is still below the maximum healthy blood pressure which is 140/90 mmHg. Adam had 22 respirations per minute and they were full depth and regular rhythm. His respirations are ever so slightly above theRead MoreThe Cardiovascular System Of The Circulatory System1265 Words   |  6 PagesThe circulatory system (also known as the cardiovascular system) is responsible for respiration (transporting oxygen and removing carbon dioxide from cells), nutrition (carrying nutrients from digested food substances to the cells of the body), waste removal (disposing cellular waste products and poisons that may have been consumed during the digestion process), immunity (fighting against infectious agents such as pathogens), cellular communication (ensuring that that the transport and the functionRead MoreGsm Based Remote Patient Monitoring System1514 Words   |  7 PagesThis paper presents the methodology for monitoring patients remotely using GSM network Very large scale integration (VLSI) technique. Patient monitoring systems consist of equipment, devices and supplies that measure, including blood pressure, body temperature, heart activity, display and record human physiological characteristics, various bodily substances (e.g. cholesterol, glucose, etc.), pulse rate, respiration rate and other health-related criteria. A patient monitoring system for providingRead MoreStem Research On Stem Cell Research1747 Words   |  7 Pagesdevastating lives continuously on end. With the use of stem cells in modern time, diseases are no longer taking control of lives. The innovation in biomedical technology, such as stem cell research, has greatly impacted the understanding of how diseases can be treated, how drugs can be tested, how more careers will be available in the future, and how newborns can safely provide help. Stem cells are cells that give rise to all other cells in the body with a specialized function. Blood cells, muscle cellsRead MoreEssay Exercise and Heart1699 Words   |  7 Pagesbenefits; it improves the oxygen-carrying capacity of the blood, development of bones, strengthens muscles and the lungs capacity plus it can make you feel good. There are different exercises and intensities for different benefits. Lower intensity exercises are not designed to work the body as hard. As a result less oxygen is needed and less waste is in excess. However even low intensity exercises require more substances to be carried out than if your body was in its resting state. Therefore different concentrationsRead MoreTreatment Of Cancer : Cancer1367 Words   |  6 Pagesthis disease as there is no definite cure. Anyone diagnosed with cancer need to be supported emotionally together with the family members. Treatment of cancer requires an extensive treatment, early detection is very useful in the management of a cancer patient. WHAT IS CANCER? Cancer consists of group of diseases that share common characteristics. The continuous division and proliferation of cancer cells to other parts of the body and tissues surrounding it is a common trait shared by all types of cancer

The Problem Of Evil And The Design Argument - 1487 Words

Problem of Evil and The Design Argument In order to explain the â€Å"Problem of Evil†, how it figures in Hume’s discussion of the argument from design and whether there is a personal acceptance of it, each point needs to be examined. Hume’s Dialogues Concerning Natural Religion utilizes three characters to represent difference perspectives to the existence of God: Cleanthes, Demea, and Philo. Cleanthes is a skeptic that provides the key voice to the argument from design. Philo, said to be the representation of Hume, provides an almost antagonist duality to the conversation. Demea’s purpose appears to give examples and thoughts solely to be shot down or proven wrong in order to substantiate the argument of the other two. It is within this dialogue that two versions of the design argument are presented and done so through analogy. From the two arguments then comes the concept of the â€Å"Problem of Evil†. I seek to try and understand Hume’s concepts and justify an opinion based on his ideas surrounding the existence of God. The Argument from Design The argument from design is used to rationalize the existence of God through analogy. The way Hume explains the argument through Cleanthes is: the universe is similar to that of complex machines; intelligent human creators build machines, therefore the universe must have an intelligent divine creator. Cleanthes analogy seems as though it is supposed to be best explanation of rational religion, but comes off as aShow MoreRelatedThe Theory Of The Design Argument1201 Words   |  5 Pagesmakes of the design argument that are described in this chapter, Hume presents a third. He says that even if the design argument succeeds in showing that a des igner made the universe (or the organisms in it), the argument does not succeed in establishing what characteristics that designer has. For this reason, the argument does not show that God exists. Is Hume’s claim correct? How seriously does this undermine the design argument? I think that Hume’s claim that the design argument does not succeedRead MoreAnalysis Of The Article On Being An Atheist1136 Words   |  5 PagesAtheist, is trying to show the readers are more reasonable and comfortable belief than that of Christianity. In the article he also puts up an argument concerning two theistic point of which is the cosmological and teleological argument. McCloskey also talks about the problems resulting from all the evil in the world. He goes as far to point out this evil in a world the God had made and blames God for it. Due to that fact and other issues, he believes that it is irrational to live by faith. AccordingRead MoreEvil : The Problem Of Evil720 Words   |  3 Pagesin a world where evil exists, it is logically impossible and that is what created the problem of evil. Problem of Evil: There are two sides of the problem of evil which are the logical and evidential arguments. The logical side states that as long as evil and suffering exists in this world there is no God. That does not only contradict with the idea of God being â€Å"all-good†, but also him being â€Å"all-knowing† and â€Å"all-powerful† as well. Because, if God only desires good, then how evil was formed unlessRead MorePhilosophy And Philosophy Of Religion Essay1681 Words   |  7 Pagesvocabulary and texts followed by the people. The religious philosophy and philosophy of religion are very different from each other, in philosophy of religion we discuss the questions regarding the nature of religion as a whole rather than seeking the problems brought by a particular religious system. In philosophy of religion we discuss the question like IS THERE A GOD?. but this is not the only question we focus on, we also look at the aspect that if there is, then what is he like, and what does thatRead MoreThe Problem Of Evil, The Fine Tuning Argument And The Moral Argument1210 Words   |  5 Pagesto talk about which which are the problem of evil, the fine tuning argument and the moral argument. According to theism, God is: â€Å"that being which no greater is possible, and he is omnipotent, omniscient and omnibenevolent.†. By having a God who only desires good, and us living in a world where evil exists, it is logically impossible and that is what created the problem of evil. There are two sides of the problem of evil which are the logical and evidential argument. The logical side states that: Read MoreAnalysis Of The Article On Being An Atheist 1290 Words   |  6 PagesGod’s existence has been challenged by many philosophers and non-philosophers alike. Arguments that have been used to support the existence of a divine being includes the cosmological argument and the theological argument. However there are some who oppose these arguments and philosopher H.J. McCloskey is among this group. In the article â€Å"On Being an Atheist† written by H.J. McCloskey, he argues that both these arguments are false and insufficient as it relates to â€Å"proof† of God’s existence. McCloskeyRead MoreEssay on Response to â€Å"on Being an Atheist†1531 Words   |  7 Pagescosmological argument, the teleological argument and the argument from design. He pointed out the existence of evil in the world that God made. He also pointed out that it is irrational to live by faith. In my response, I will argue that McCloskey’s article is one-sided an d thus flawed in his conclusion that atheism is more comforting than Christianity and when one examines all the evidence, Christianity is truly a source for great comfort today. McCloskey argued that the cosmological argument wasRead MoreThe Question Of God s Existence1575 Words   |  7 Pageshonest with myself, during many hard times I have questioned Gods existence myself. Arguments that have been used to support the existence of a divine being includes; the cosmological argument and the theological argument. However, there are some who oppose these arguments and philosopher H.J. McCloskey is among this group. In the article â€Å"On Being an Atheist† written by H.J. McCloskey, he argues that both these arguments are false and insufficient as it relates to â€Å"proof† of God’s existence. McCloskeyRead MoreAnalysis Of The Article On Being An Atheist 1538 Words   |  7 PagesGod’s existence has been challenged by many philosophers and non-philosophers alike. Arguments that have been used to support the existence of a divine being includes the cosmological argument and the theological argument. However there are some who opp ose these arguments and philosopher H.J. McCloskey is among this group. In the article â€Å"On Being an Atheist† written by H.J. McCloskey, he argues that both these arguments are false and insufficient as it relates to â€Å"proof† of God’s existence. McCloskeyRead MoreMccloskey Responses1660 Words   |  7 Pagesor influence. From the beginning many people have had questions about God and his existence. He wrote numerous books on atheism between 1960 and 1980 including the famous book, God and Evil. This paper evaluates the credibility of McCloskey’s article â€Å"On being an Atheist†. One of the McCloskey’s core arguments against theism is his demand for any proof that ascertains theists’ beliefs on God’s existence. He believed that atheism is more comforting than theism because most Christians do not believe

Marketing †Right Choices Free Essays

string(23) " Australia as at 2011\." | Off Campus Assignment Handling Services Division of Information Services Nathan Campus GRIFFITH UNIVERSITY QLD 4111 | ASSIGNMENT COVER SHEET Open Universities Australia | Student details| Name| Gokhan Aykut| Course| B. Comm| Unit details| Unit code| MKT 103| Unit name| Introduction To Marketing| Unit tutor| Kieth| Assessment Item details| Marketing Report| Due date| 20/02/2012| Word count| 2500| Extension granted| v? No ? Yes| Extension date| | Is this a resubmission? v? No ? Yes| Resubmission date| | ACADEMIC INTEGRITY DECLARATION Breaches of academic integrity (cheating, plagiarism, falsification of data, collusion) seriously compromise student learning, as well as the University’s assessment of the effectiveness of that learning and the academic quality of the University’s awards. All breaches of academic integrity are taken seriously and could result in penalties including failure in the course and exclusion from the University. We will write a custom essay sample on Marketing – Right Choices or any similar topic only for you Order Now Students should be aware that the University uses text-matching software to safeguard the quality of student learning and that your assignment will be checked using this software. I acknowledge and agree that the examiner of this assessment item may, for the purpose of marking this assessment item: 1 reproduce this assessment item and provide a copy to another Griffith staff member; and/ 2 submit this assessment item to a text-matching service. This web-based service will retain a copy of this assessment item for checking the work of other students, but will not reproduce it in any form. Examiners will only award marks for work within this assignment that is your own original work. I, hereby certify that : 1 except where I have indicated, this assignment is my own work, based on my personal study and/or research. 2 I have acknowledged all materials and sources used in the preparation of this assignment whether they be books, articles, reports, lecture notes, or any other kind of document or personal communication. 3 I have not collaborated with another student or person in planning, eveloping and writing this assessment item. 4 this assignment has not been submitted for assessment in any other course or at any other time in the same course. 5 I have not copied in part or in whole or otherwise plagiarised the work of other students and/or other persons. 6 I haven’t made this piece of work available to another student. Providing this declaration falsely is considered a breach of academic integrity. I have retained a copy of this assessment item for my own record s. Date: 09/01/2012. (Gokhan Aykut) | Executive Summary The following report is the marketing plan for the new Nokia Lumia 910G for the global market for the financial year of 2012-2013. After many years of unsuccessful handsets which have lead to a decline in growth, this handset is designed to regain the market share globally and for Nokia to lead into a new generation of developing low cost handsets with high end features with the added benefit of showing to the world that Nokia is environmentally conscious and a proud ambassador for protecting our very fragile planet. The company’s mission statement Everyone has a need to communicate and share. Nokia helps fulfill these needs and we help people feel close to what matters. We focus on consumers by providing very human technology† * Commitment to deliver outstanding and innovated products to our customers. We seek to become the number one electronics company throughout the world. * Focused to maintain outstanding relationship with all of customers and distribution partners globally. By maintaining our strong relationship our aim is to become once again the number one handset manufacture globally. The marketing plan will focus on the smartphone and the current line of smartphones that Nokia has introduced, it will outlined the detailed of the current promotion and marketing campaigns used and how it could further better those campaigns. The target market that this handset will be focused on is generation Z in particular, 15-22 year old males and females. This generation is the trend setters of today and are ‘digital natives’, it will also analyse relevant factors with the company including, competitors, customers and SWOT analysis. Table Of Contents Executive Summary†¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦.. 2 Introduction†¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦ 4 Situation Analysis†¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦. 5 Macro Environment†¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦.. 6 Political Legal Environment†¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚ ¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦ 7 Technology†¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦. 7-8 Competitor Analysis†¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦. 8-9 Consumer Analysis†¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦ 9-10 Internal Environment†¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦. 11 Sales Market Share†¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢ € ¦Ã¢â‚¬ ¦ 11 Brand Awareness†¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦. 1 Promotional And Marketing†¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦.. 11-12 SWOT Analysis†¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦. 13-14 Objectives†¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦.. 15 Target Market†¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â ‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦. 16 Positioning Map†¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦. 17 Marketing Mix Strategies†¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦.. 18-20 Evaluation†¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦.. 21 Implementation†¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦.. 22 Conclusion†¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦ †¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦. 23 References†¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦. 24 Introduction Nokia was first established in 1865 on the banks of Nokianvitra River in Finland by Fredrick Idestam. He would set up a wood pulp mill and produced paper, the original form of communication. It was later on were a merger took place with Finnish Rubber Works and Finnish Cable Works that gave birth to Nokia Corporation in 1965. The name of Nokia would be growing at a rapid rate, and eventually the company would be a major player for 31 network operators around the world. Nokia initially targeted low income people and first time mobile buyers, with the introduction of the 1100 series. Today the company has grown into the largest manufacturer and distributor of mobile phones. With the introduction of OVI (internet services for the Nokia Brand) in 2007, Nokia has now become a major player in the smart phone industry, and with its newly formed alliance with Microsoft Corporation and Windows Mobile, the sky is the limit for this iconic brand. Situational Analysis The major mobile handset suppliers in Australia now include brands such as Nokia, Sony Ericsson, Samsung, LG, Motorola, Sonim, HTC, Palm, Blackberry, Garmin Asus, Alcatel and Apple iPhone. The cost has gone from over $5000 in 1981 (in car system) to Telstra’s cheapest model available today at $35. Mobile coverage, customers and functionality has changed dramatically over 30 years and together with the Internet, social media and affordability; mobile communication has permanently changed the way in which people live and work. There are now an estimated 22 million mobile phone services in Australia as at 2011. You read "Marketing – Right Choices" in category "Essay examples" (Budde. com, 2011). The mobile phone market in Australia is highly competitive in terms of both service and phone suppliers. In the area of service providers the dominant player is Telstra, although with a policy of competition, other organisations are developing strong competitive positions. Pre-paid and post paid plans also form a basis for competition between providers. The chart below provides an insight into both service providers and types of service in 2008. Item 3 on the chart includes â€Å"other† suppliers. Source: Mobility Magazine (2011) 10 (3). The Finnish Nokia Brand remains the world’s largest mobile phone producer; although its market share has dropped to 23. 9 percent (from 28. 2 percent last year), and Samsung, LG and Apple are showing strong growth. (IBT March 24 2011). Macroenvironment Economic Environment Economic conditions affect the way in which consumers spend. They also affect the way in which companies spend on such things as product development, range and inventory of stock. The present world economic crisis in Europe has had an influence on both consumers and manufacturers. Global sales of all mobile phones showed a growth rate of 5. 6 percent in the third quarter (2011) compared to 16. 5 percent in the previous quarter. Global sales of Smartphones were also down from 74 percent growth to 42 percent in the third quarter whilst inventories have grown by 20 million phones during the same period. MobiThinking, 2011). Australia has shown better economic performance than that of most other countries, but this too is dependent on factors outside of its’ control. Given that the major manufacturers of mobile technology are multi-nationals, they will feel the effect of any economic downturn, which may also then be seen here. Consumers have shown reluctance worldwide to purchase new phones during the European credit crisis, although this m ay be mitigated by consumers waiting for new flagship devices to be released. Gartner, 2011). Even if Australia is insulated from the full effects of a major economic downturn in the near future, it is likely to affect the purchasing intentions of the mobile phone market Political Legal Environment The telecommunications market is important to the domestic economy and as such is subject to political and legal constraints. Politics has led to opening the market to competition, and it is maintaining and strengthening competitive forces. In terms of service providers, they have to operate within a legal framework that is subject to political influence and overseen by such bodies as the Australian Competition and Consumer Council (ACCC) in accordance with Fair Trade and Trade Practices Acts. There is also protection of intellectual property, as well as trademark/design and brand protection in Australia that companies have to consider when marketing their goods and services. Technology Technology has been an essential driver of the mobile phone market for both carriers and handset providers. The original AMPS (Advanced Mobile Phone System) was launched in 1987 and provided an analogue or 1G service and by 1989 had 100,000 subscribers. In 1992, both Optus and Vodafone were licensed and the number of subscribers reached 500,000. In 1993 Telstra launched its new 2G network, and by 1996 there were over one million digital subscribers and 2. 5 million analogue users. Four years later the AMPS service ceased, however, by 2003 the first 3G network together with the Nokia e606 mobile phone allowed for both video calls and high-speed Internet access. By 2005 half the Australian population had a mobile phone, and at present (2011) there are more subscribers than people in Australia. (ActewAGL, 2009). In each stage of development carriers and phone manufacturers worked together to increase the range and variety of applications that could be performed by mobile devices, culminating with the issue of the Apple 4 iPhone in 2011. Ongoing development includes Apple’s new battery solution (Hydrogen Cell) that could power the iPhone for ‘weeks’ (AEDT, 2011). The different architecture or platforms used and being developed for the smartphone market will provide both marketing and technology-related opportunities. Operating Systems (OS) such as Palm and BlackBerry, Symbian and Windows Mobile, are all likely to increase competition and consumer choice in the market. Competitor Analysis: Both carriers and retailers/manufacturers operate in a dynamic and highly competitive market. There is a plethora of â€Å"deals† in the marketplace covering both service providers and retailers. Continual new product innovations have put pressure on companies to innovate or lose market share. For example, the Apple iPhone radically changed the product landscape realising phenomenal growth since its release in 2007. (Australian IT, 2011) The introduction of competing phones and platforms that offer advantages peculiar to an individual system is likely to fuel a continuation of the current technological â€Å"war†, which, combined with aggressive marketing from all the major suppliers, makes for an evolving and unpredictable mobile phone market. Mobile phone marketing strategies are aimed at both the business-to-business (B2B) market and the business to consumer market (B2C). Some of the strategies used include; multiple pricing (B2B) as in supplying all the phones for a specific company (eg. Origon Energy), bundling, where the phone and plan form the purchase and provide value for the bundle for both business and consumer markets, two for one deals, free talk time, (for a specified value above that which is paid for in the mobile phone plan), and many more. Customer/Consumer Analysis Customers can be classified in terms of business and non-business. The business sector is more rational, value driven and information hungry. Business customers will adopt a structured approach to analysing costs and, n the main, make choices based on full information. Consumers as individuals constitute a different market, with different needs and associated motivations. From the very beginning mobile phones were seen as status symbols, owning one increased one’s social standing and position. This still remains a key driver for innovators who will purchase new and im proved phones as soon as they are available, and bask in their (perceived) increased social standing or â€Å"Street Cred†. Mobile phones have had a symbiotic relationship with social media such as Facebook and Twitter. One has supplied the other with the means to expand and capture a huge consumer audience. As such there has been considerable research conducted into other motivations, needs, and influences that affect the interface of mobile phones and social media. (Lenhart, 2009). For instance, Telstra has released consumer research showing how Australians use their mobiles to connect. It found:  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚   * 50 percent of Australians feel panic stricken within five minutes when they think they have lost their mobile phone; 25 percent panic after less than a minute. Nearly one third of Generation Y consumers check their mobile phones in the mornings before they use the bathroom, have breakfast, or go online. * Nearly half of Australians rank mobile phones as the innovation they value the most, more than the desktop computer to laptop and the oven to microwave. (SMH, 2011). Mobile phones are an integral part of a consumer’s life affecting the ways in which they conduct business and leisure activities. With the introduction of the Smart Phones, consumers now have the capacity to interact with one another in ways that have completely and radically changed the marketing landscape. Apart from using applications for shopping online or as a means of supplementing high street purchases) they can now join communities and share opinions about goods and services that are really empowering them in the consumer decision-making process. Internal Environment Sales And Market Share The global mobile phone market is extremely competitive in terms of manufactures. In 2007 Nokia was number one handset manufacture, with a global market share of 38 percent, and estimated sales of â‚ ¬32 billion. Five years later, Nokia finds themselves losing their crown as number one handset anufacture to its long time completive rival, Samsung Electronics. Nokia’s market share has slumped to only 19. 8 percent in the handset market, which works out to be a 52. 1 percent decline from 2007. Nokia has just released its fiscal Q2 2012 financials. It’s reported â‚ ¬7. 5 billion in net sales, a slight increase from the â‚ ¬7. 4 billion last quarter. Net sales are down by fiv e percent, and the operating loss is almost twice the value it was last quarter: â‚ ¬826 million compared to â‚ ¬487 million a year ago. Brand Awareness Nokia has built a reputation on being one of the world’s number one handset manufactures. Nokia initially targeted low income earners and first time mobile phone owners, but since has grown into a leading and innovating smart phone supplier to the world. The brand’s mission statement is heavily focused around communication. â€Å"Everyone has a need to communicate and share. Nokia helps fulfill these needs and we help people feel close to what matters. We focus on consumers by providing very human technology† Nokia’s brand is built around friendship, trust and customer loyalty. Building friendship and trust is at the heart of the brand, and this is visual communicated to customers by two hands shaking. Promotion And Marketing Currently Nokia is heavily promoting there Lumia family of Windows Phones on a massive global scale. These include 4D projections and live music events. Along with Nokia pushing heavily the Lumia range, Microsoft has jumped on board and pushing hard with carries around the world to promote the Windows based handset, this is done with the â€Å"Smoked by Windows Phone† campaign. This camping was based around simply a bet where people would win a $100 if their non-Windows phones is quicker than the Lumia handset running the Windows Phone software. According to Nokia Australia’s head of marketing, Jolaine Boyd, â€Å"This new brand proposition and campaign signals a new Nokia – a company that is thinking and doing things differently. Our aim is to fundamentally shift consumer perceptions and educate them about Nokia’s new smartphone range. We want to put Nokia firmly in the consideration set and make the brand relevant again. † This current camping focuses, on Nokia’s global brand positioning and promoting â€Å"Amazing Everyday† which is heavily focused around portraying the amazing thing we do as humans every day with a massive focus on social media and the youth of today. There are three core elements within this camping and they are, out of home, TV and digital. Boyd added, Australia has the highest smartphone penetration in the world at 37 per cent. The rise of smartphones is dramatically increasing the use of the internet overall in Australia. With this in mind the â€Å"Amazing Everyday† campaign, the current advertisement of the new Lumia range capitalises on these aspects, with bright and bold colours with simple statements. Some of these advertisements are below. SWOT Analysis Strengths Nokia incorporated has a rich history and a wealth of experience which spans well over a 100 years. The company has one of the largest networks of distribution and selling partners in the world. Currently Nokia has one of the largest R;D departments in the world, which has a strong financial backing with over 1. 4 billion USD which allows Nokia to keep producing new and revolutionary products for its customers. Nokia produces many different handsets for different people for their day to day use and pride themselves on building relationships and sustaining them. The build quality of Nokia handsets are at world class levels, which gives to a much higher resale value than its competitors. Weakness Nokia is a well-established company with many strengths, but is main strength has also turned out to be its biggest weakness. The handset giant unfortunately did not move along with the technological move that sweep through right after the turn of the millennium. With the introduction of the iPhone, the handset giant was consistently producing the same type of phone but with a different designs and still asking customer to pay premium prices. The handsets that were being produced were overpriced and customers wanted more from their Nokia’s. Customers became app crazy and with the introduction of social media on the go, Nokia was lagging behind. Bold moves by Nokia gave birth to the NGAGE, a portable gaming console. The handset was designed to make phone calls, send text and surf the web with the added advantage of being able to play your favorite â€Å"retro† on the go. The concept was great but unfortunately this radical all in one device was not accepted by the market, customers still prefer the iPhone. This then gave birth to the N97 a poorly created handset which was very clumsy and had outdated software. Opportunities There are many opportunities at present for Nokia. One of these opportunities is for the company to enter new growing markets, such as the Indian market. â€Å"By entering a newly developing market it has an opportunity to increase its sales as well as the overall global market share. As the standard of living in India has increased so has the purchasing power of the people. By targeting the market at the right time Nokia can gain the most out of this situation†( Nokia SWOT Analysis). Nokia has been a leading the way for many years with its well-designed handsets, these designs have gave birth to other handsets such as the iPhone. With the addition of Cal Zeiss to the portfolio, Nokia now has outstanding cameras on their handsets as well. Threats Nokia has many competitors in the market that it must attach to maintain its position as the market leader. The threats are emerging handset manufactures in the market. Companies like Motorola, Sony, LG mobile, Apple and HTC. The manufactures are providing equal or better products and presenting to be tough competition for Nokia in the global market. These threats can be providing cheap phones, new features, new style/types, and premium after sales service. So the growing competition has created an uphill battle for Nokia. With global economic downfall Nokia has to produced premium quality handsets at competitive prices, if this issue is not tackled head on it could create greater problems for Nokia in the future. Objectives Mission Statement â€Å"Everyone has a need to communicate and share. Nokia helps fulfill these needs and we help people feel close to what matters. We focus on consumers by providing very human technology† * Commitment to deliver outstanding and innovated products to our customers. We seek to become the number one electronics company throughout the world. * Focused to maintain outstanding relationship with all of customers and distribution partners globally. By maintaining our strong relationship our aim is to become once again the number one handset manufacture globally. Marketing Objectives * Increase sales by 10% within one year. Use innovative technologies, such as Nokia Kinetic a world first flexible LCD, the introduction of WP8 handsets, to increase our target audience’s awareness to illustrate our competitive advantages. Refine current products. Improve current products to reach new markets based on unmet consumer needs. Sales Objectives * To achieve sales on 10,000 units per quarter across every carrier and to have net sales exceed $100,000 per month. * To gain 15 per cent of the total Australian market share with WP7 handsets and to achieve globally 30 per cent. Total marketing budget for WP7 handsets in 20 per cent. Target Market Primary Market 15-22 year old males and females, or better known as generation Z. Most members of this generation have spent their entire lives on the World Wide Web. Generation Z are a highly connected into technology – they are the trend setter. The generation has spent their whole lives around technology and new forms of communications, such as the World Wide Web, instant messaging, texting, iPods, mobile phones, Facebook, twitter and YouTube, giving them the new name of â€Å"digital natives†. These trend setters are no longer using the internet on their PC’s but rather it is on the go and carried in their pockets on their mobile phones. This generation is trend setting however very lazy; they want something that is easy to use out of the box with no hassles. Market Positioning Nokia’s brand positioning should differentiate itself from the past. In the past Nokia handset was specially designed for low end users, while the N series was aimed at trend setters, it lacked substance and failed to capture the digital natives. With handsets that were out shadowed by the iPhone, Nokia quickly lost its majority market share. Nokia has to aggressively attack the smartphone market by specifically targeting the trend setters of today. The trend setters of today are driven by technology and want handsets that are easy to use, they are heavily driven by social media, and their social status is of the highest priority. The key strategy is to maintain its leadership and lower prices on smartphones while providing high end products for the masses. Positioning Map Innovation Samsung Samsung Nokia Nokia Future Positioning Future Positioning Apple Apple Sony Sony Nokia Nokia Current Positioningnt Positioning Positioning Current Positioningnt Positioning Positioning High Price High Price Low Price Low Price LG Mobile LG Mobile Competitiveness Marketing Mix Strategies Product According to O’Connor ,B (2000) A well-thought-out marketing plan can give you the ability to exploit your competitors’ weaknesses, adjust to any new competition, expand your service capabilities, strengthen customer relationships and minimize sales volume fluctuations. It will also help eliminate unproductive promotions and enable you to create and control the specific image you want to project. To have an impact on the market, Nokia needs a blockbuster – a single, stunning smartphone that puts the company back on the map alongside with Windows Phone. Windows Phone 8 has a lot of interest from various carriers, by taking advantage of all this, the company can get its groove back. The handset must be simple to use, jam packed with technology while upholding two key fundamental features – social media and easy to use. Nokia introduced a whole line accessories free of PVC, keeping in touch with this green aspect already adopted by Nokia, the Lumia 910G will have a specially designed solar panel will built into the back of the handset, as part of the battery cover. Ten minutes of sun exposure will get you three minutes of talk time and the phone’s casing will be made entirely from recycled plastic water bottles. Other key features are, quad core processing power, 12 mega pixel camera with Carl Zies lens, Nokia flexible AMOLED screen. 4. 7 inch 4. 7 inch Solar Panel Solar Panel Recycled Materials Recycled Materials Place/Distribution Having already established a channel of distribution partners globally, the handset will be available through all major vendors globally as well as to be purchased through online vendors such amazon and Nokia online. The opportunity exists to expand through existing areas, but with heavy focus on the Nokia online store. This channel present great opportunity as there is no overheads. Price Price for this handset is directly set against competitors like the Apple IPhone 4s and Samsung Galaxy S3. The handsets’ being manufactures offshore in China and allows entry into the market at $350 per unit. The pricing strategy is very aggressive, keeping in line with the market audience the handset is directed at. This handset will be the first smartphone with high end features for very low costs. Being of all recycled plastic design allows maximum build quality with minimum costs. Promotions The use of viral marketing is the quickest way to get the word out about the new handset, as the use of social networks will spread the message quicker. According to Berkowtiz, D (2010) blogs and social media can be useful for establishing direct communication between marketers and consumers, and they can contribute to establishing a larger share of voice in search engine results. One such example of this is the ‘Best job in the world campaign’ that involved getting a job in the topical islands of the great barrier reef. The campaign had generated so much interested that the publicity around it was worth well over $150 million and in the process highlighted Queensland as an ideally holiday destination. By heavily promoting the Smoked by Windows Phone† campaign, over social media sites, the word of the Lumia 910G will spread. Evaluation According to Harris, A (2010), there is a lack of strategy for using these new social media tools. It is often viewed as a technology issue, not a communications tool. Improving brand awareness and exposure involves creating an online presence, delivering key messages to a target audience and then building relationships with potential customers. Social media allows for these behaviors, as well as enhancing a company’s credibility. Social media is fairly new components to marketing, this type of marketing involve a company interested in increasing brand awareness and exposure to new and existing customers. By gaining the trust and respect of potential customers through frequent, but informal postings public relations teams may then assess the results of the marketing campaign. Although posting cannot be quantitatively measured, it can eventually lead to sales. According to Connor, A (2010) public relations professionals must develop creative strategies for linking online community participation to direct revenue. The interested fans having these conversations may be more inclined to purchase from their online friend than someone else. The will give an indication into measuring the sales volumes achieved through social media. From here, Nokia can determine if social medial marketing is worth the time that has been invested into. Implementation Conclusion This report sets out the marketing plan for the new Nokia Lumia 910G. The handset is made from recyclable plastic water bottles and sports a solar panel on the back for additional power for the handset. It is a leading and innovating handset with superior features at the fraction of the price of its competitors. The handset is specifically aimed at the trend setters of today, the ‘digital natives’ The sales objectives is to achieve 10,000 units per quarter and to achieve a sales revenue of $100,000 per month. Back boning on the currently successful promotion ‘Smoked By A Windows Phone’ campaign and the use of social media the aim is to regain the majority of the globally market share and to become the number one handset manufacture in the world. Reference Berkowitz, David Social Marketing Advertising Age 81:8 (Feb 22,2010):54 Connor, Angela. Market With Social Media 21 Dec. 2009: Research Library, ProQuest. Web. 21 Feb. 2010. Harris, Angela. Does Social WORK? Measuring Community Effectiveness. EContent 1 Jan. 2010: Research Library, ProQuest. Web. 22 Feb. 2010 O’Connor, Bob Motor 193. 3 (Mar 2000): p71-74 http://www. authorstream. com/Presentation/sanju152k-262736-nokia-final-education-ppt-powerpoint/ http://www. campaignbrief. com/2012/03/version10-starthtml0000000149-190. html http://www. informationweek. com/news/mobility/smart_phones/232901759 http://www. marketing91. com/swot-nokia/ http://www. moyeamedia. com/blog/? p=2361 http://techland. time. com/2012/07/20/lets-be-realistic-about-nokias-chances/ How to cite Marketing – Right Choices, Essay examples

Love Essays (781 words) - Social Philosophy, Emotions,

Love Love is a theological virtue that enables us to develop caring relationships with God and others. With love comes sexuality, which is the condition of having a gender and relating to others as a result of that gender. Love and sexuality often go hand and hand but when people deal with these factors there are guidelines so that people do not abuse two wonderful gifts that God has given us. To live a chaste life is not always simple and easy. There are cultural challenges that affect us and make it difficult for us to make the right decisions. These challenges test us and can make us stronger people. First, sexual intercourse, which is the most intimate act between a man and a woman in marriage, is sometimes used as a way to obtain money and power. At times people's lives become like soap operas because of their greed and the low regard they have for nurturing love. Also, sex is often the hook or gimmick for an advertisement. It sells perfume, furniture, cars, gum, clothes, food, and anything else imaginable. It becomes the reason to see a movie or comedian. Second, in our culture love is used to describe a feeling for many things. This makes it hard for a person to be sure that they really love a person, or that the other person truly loves them. And finally, in our culture growing up as a kid the Catholic religion, the labels of sex being dirty or sinful often paint t he wrong picture of a perfectly normal; intimate act that God Himself created. Then, a person sees the virtue of chastity as just another rule to brake. Another rebellious act has no meaning based on the first impression they were given about sex. Society is another obstacle to overcome when a person is trying to live a chaste life. First, for people of all ages peer pressure is a force to reckon with. The pressure on each of us to conform to the standards of others can be great. The point of peer pressure is to make a person feel that they are not accepted unless they do what others are doing. When it comes to having, sex encouragement and pushing from outsiders make things harder. Second, society gives us a blanket to shield ourselves with, which sounds good but is really a lie. It is the lie of individuality. The person says they are doing what they are doing not because of someone else but because they want to do it. But actually, people say this so often that it is really a scapegoat for conformity. And third, the familiar phrase everybody's doing it is another excuse, however, in reality, not everyone is doing it in the first place and that's them, and not you. Christian love includes three qualities; one of them is responsibility. Responsibility means being able to answer for one's conduct and obligations and being able to choose for oneself between right and wrong. As Christians, we believe that we are temples of the Holy Spirit and because of that privilege, we have a responsibility to treat ourselves and others not as objects but as persons, God's human beings. Another quality in Christian love is respect. Respect is an act of giving particular attention or consideration to a person. All people deserve respect. A person's partner especially deserves to be held in high regard. In Jesus' image, we are called to respect others and ourselves, which is something that comes before truly loving someone. When you love someone, you respect their ideals, beliefs, and wishes. A final quality in a love that is chaste is self-control. Self-control is restraint exercised over one's own impulses, emotions, or desires. Because we are disciples of Jesus, the right thing to do is to be obedient to Him. And to try to act based on the mutual good of others and ourselves. My character is best enhanced by mature and responsible relationships by putting out effort. It involves a life-long way of relating to others. Also, there are rewards to living a chaste life such as a sense of true freedom and happiness because I am relating rightly to others. My

sublimade messages essays

sublimade messages essays Are you sure that you arent being subconsciously manipulated into making decisions that you wouldnt normally make? Are you sure that over the next few days, your purchases of popcorn and Coke will be completely under your conscious control? Are you even sure that I havent embedded secret messages into this research paper to manipulate you into giving me an A? If you didnt consciously perceive secret messages but you did perceive them subconsciously, then they would be called subliminal. The word subliminal literally means below the threshold (Encarta 99). The threshold is the level at which you are aware of stimuli, so if something is below the threshold, or subliminal, you are not consciously aware of it. Therefore, you may be receiving messages and obeying them without even realizing it! What I have set out to prove through my research report is that people are being manipulated by the media through subliminal advertisements. Subliminal advertisements stimulated significant public attention in 1957. It was reported that a motion picture theater in New Jersey had flashed subliminal messages on its movie screen during the showing of the movie Picnic. These messages appeared on the face of the actress Kim Novak every 32 seconds and urged the audience to Eat popcorn and Drink Coca-Cola over a course of six weeks. 49,699 people viewed these subliminal messages. The movie theater reported that its concession sales increased 58%. Some people just dismissed this as a publicity stunt or believed that you cant be affected by something you cant perceive. The truth is that nobody has ever been able to reproduce this result. However, this incident caused many people to take interest in the subject of subliminal perception. One such person was Vance Packard who wrote the very popular book, Hidden Persuaders, which appeared in the London Sunday Times as ...

The 5 Sectors of the Economy

The 5 Sectors of the Economy A nation’s economy can be divided into various sectors to define the proportion of the population engaged in different activities. This categorization represents a continuum of distance from the natural environment. The continuum starts with primary economic activity, which concerns itself with the utilization of raw materials from the earth, such as agriculture and mining. From there, the distance from natural resources increases. Primary Sector The primary sector of the economy extracts or harvests products from the earth, such as raw materials and basic foods. Activities associated with primary economic activity include agriculture (both subsistence and commercial), mining, forestry, grazing, hunting and gathering, fishing, and quarrying. The packaging and processing of raw materials are also considered to be part of this sector. In developed and developing countries, a decreasing proportion of workers is involved in the primary sector. Only about 2 percent of the U.S. labor force is engaged in primary sector activity today, a dramatic decrease from the mid-19th century when more than two-thirds of the labor force consisted of primary-sector workers. Secondary Sector The secondary sector of the economy produces finished goods from the raw materials extracted by the primary economy. All  manufacturing, processing, and construction jobs lie within this sector. Activities associated with the secondary sector include metalworking and smelting, automobile production, textile production, the chemical and engineering industries, aerospace manufacturing, energy utilities, breweries and bottlers, construction, and shipbuilding. In the United States, a little less than 15 percent of the working population is engaged in secondary sector activity. Tertiary Sector The tertiary sector of the economy is also known as the service industry. This sector sells the goods produced by the secondary sector and provides commercial services to both the general population and to businesses in all five economic sectors. Activities associated with this sector include retail and wholesale sales, transportation and distribution, restaurants, clerical services, media, tourism, insurance, banking, health care, and law. In most developed and developing countries, a growing proportion of workers is devoted to the tertiary sector. In the United States about 80 percent of the labor force is tertiary workers. The Bureau of Labor Statistics puts non-agriculture self-employed into its own category, and that accounts for another 5 percent of workers, though the sector for these people would be determined by their job. Quaternary Sector Although many economic models divide the economy into only three sectors, others divide it into four or even five sectors. These final two sectors are closely linked with the services of the tertiary sector. In these models, the quaternary sector of the economy consists of intellectual activities often associated with technological innovation. It is sometimes called the knowledge economy.   Activities associated with this sector include government, culture, libraries, scientific research, education, and information technology. These intellectual services and activities are what drives technological advancement, which can have a huge impact on short- and long-term economic growth. Quinary Sector Some economists further subdivide the quaternary sector into the quinary sector, which includes the highest levels of decision making in a society or economy. This sector includes top executives or officials in such fields as government, science, universities, nonprofits, health care, culture, and the media. It may also include police and fire departments, which are public services as opposed to for-profit enterprises. Economists sometimes also include domestic activities (duties performed in the home by a family member or dependent) in the quinary sector. These activities, such as child care or housekeeping, are typically not measured by monetary amounts but contribute to the economy by providing services for free that would otherwise be paid for.

Contemporary Rhetorical Analysis Term Paper Example | Topics and Well Written Essays - 2500 words

Contemporary Rhetorical Analysis - Term Paper Example Moreover, aside from being the greatest leader he could be, he had also proven himself of how the greatest speaker he could be. On the eve of Quit India Movement on August 8, 1942, Gandhi had communicated his Quit India speech which was a call for a determined but a passive resistance. Given this brief background, this essay would obtain observation and insights on Mahatma Gandhi’s â€Å"Quit India† through the use of rhetorical analysis while focusing on the metaphors of the said rhetoric. Upon my analysis of â€Å"Quit India,† I could say that his speech was definitely one excellent illustration of what was called a good rhetoric. Mahatma Gandhi’s Quit India was a really persuasive speech for it was indeed a success for him to appeal his audience’s rational, emotional and principled sense. His speech which was motivational and inspirational, was effective in moving his audience into a non – violent and passive movement against the British power. His ideas, attitudes, stand, and even his own self had been victorious in influencing his fellow Indian citizens through â€Å"Quit India.† Furthermore, Gandhi’s manner of style was not directed to any particular class or group of Indian people. He used the word â€Å"we† in some portions of his speech instead of just referring to himself to address an audience who were diverse in terms of their culture and religion. His speech had not appealed any divided sector of Indians but he called for unity when he said Hindus and Muslims must forget about their differences in identity but what should remain in them was their Indian identity. By the word â€Å"we,† whether they were not totally the same, they were one because they were all Indians. For me, in my attempt to discover his worldview, I could say that democracy would only begin once Indians had forgotten the differences in their being Hindus or Indians. It was only through forgetting their differences that would start their unity and equality.

Research Proposal (How effective is the use of fluoroscopy in the

(How effective is the use of fluoroscopy in the diagnosis of cancer in the upper (GIT) gastrointestinal tract in comparison to CT and MRI) - Research Proposal Example ntion of establishing the appropriateness of fluoroscopy in the diagnosis of different types of cancer, when compared to other applicable medical technologies. The major aim and objective of this research project is to establish the effectiveness of applying fluoroscopy in the diagnosis of cancer in the upper (GIT) gastrointestinal tract, when the effectiveness of the diagnosis technology is compared to CT and MRI. Fluoroscopy is a health technology whose application has enabled physicians to undertake the diagnosis of major health problems with greater ease. This is owing to the fact that this method enables the physicians to observe and assess the body’s inner system, when the body is actually functioning (Becker, 2010). Nevertheless, while this health technology is so crucial for the health fraternity, fluoroscopy is associated with the exposure of radiation ions to the patients, which may in turn cause negative health implications. On the other hand, CT and MRI are other health technologies that act as alternatives to fluoroscopy in the assessment of different forms of cancer inpatients. Therefore, this research project seeks to establish the most effective technology between fluoroscopy on the one hand, and CT and MRI on the other hand. Further, the effectiveness of the treatment of cancer rests in the ability of the cancer to be detected at a very early stage, so that the patients can be enrolled to a treatment program early enough before the cancerous cells spread to the rest of the body (Belafsky & Kuhn, 2014). Therefore, the proposed research project also seeks to evaluate how effective fluoroscopy is in detecting cancer at an early stage. The effectiveness of fluoroscopy will also be compared to the effectiveness of early detection for both CT and MRI. The research project will entail the assessment of records from different specialized cancer treatment hospitals, where patients undergo the diagnosis and treatment of cancer in the upper (GIT)

Glyceraldehyde-3-phosphate dehydrogenase (GAPDH) in the downregulation of Bamboo mosaic virus and its associated satellite RNA Replication :: Biology, RNA

The association of host proteins with viral replicase complexes has been demonstrated in a number of plus-strand RNA viruses (1, 24), including the Bamboo mosaic virus (BaMV). In BaMV it has been reported that chloroplast phosphoglycerate kinase (PGK) (25) and HSP90 (Huang et al., unpublished data) are required for the efficient accumulation of BaMV; where as the identity of the additional factors associated within the BaMV RdRp complex, and the proteins involved in satBaMV RNA replication are not yet been acknowledged. This study identified a host metabolic enzyme namely GAPDH, that interact to negatively regulate the Bamboo mosaic virus (BaMV) and its associated satellite RNA accumulation. The RNA binding properties of GAPDH has already been documented for a number of viruses (9, 14, 29, 41, 53, 56). However, the interaction of GAPDH protein with different viral RNAs results in a functionally different mode of regulation on viral replication and translation. For instance: GAPDH int eracts with the JEV NS5 protein indirectly by binding with 3†²-ends of JEV, resulting in virus-induced redistribution of GAPDH to control the early stage of JEV replication/translation (53). GAPDH plays a major functional role in the replication of tombusviruses through the retention of the viral minus-strand RNA template in the replication complex in order to promote asymmetric RNA synthesis (48). In contrast, GAPDH inhibits viral replication in the interaction with other viruses. For example: Silencing GAPDH increases TGEV infection by 2-3 times, demonstrating the anti-TGEV activity of this protein (14). Binding GAPDH to the HAV RNA suppresses cap-independent translation due the destabilization of the secondary structure of RNA (55). In our study, a downregulation of GAPDH-C led to a 2 to 3-fold increase in the replication BaMV and satBaMV RNA, indicating that GAPDH-C has an inhibitory effect on BaMV and satBaMV infection. In addition, an increase in BaMV-GFP was observed on inoculated leaves in GAPDH-C silenced N. benthamiana, revealing that GAPDH-C functions in the early stages while the virus is establishing a successful infection of the primary invaded cells. Similarly, when GAPDH-C is transiently expressed, a 70-80% reduction in the accumulation of BaMV as well a considerable downregulation of BaMV-GFP/satBaMV-GFP was observed in N. benthamiana plants. A similar decrease in the accumulation TMV and the size rather than the number of TMV- GFP foci was observed when TARF was transiently expressed in N. benthamiana (52). Together, this appears to imply that the expression of GAPDH-C has a negative effect on BaMV/satBaMV infection.

Time to Digital Converter Used in All Digital Pll

Master Thesis ICT Time to Digital Converter used in ALL digital PLL Master of Science Thesis In System-on-Chip Design By Chen Yao Stockholm, 08, 2011 Supervisor: Dr. Fredrik Jonsson and Dr. Jian Chen Examiner: Prof. Li-Rong Zheng Master Thesis TRITA-ICT-EX-2011:212 1 ACKNOWLEDGEMENTS I would like to thank: Professor Li-Rong Zheng for giving me the opportunity to do my master thesis project in IPACK group at KTH. Dr. Fredrik Jonsson for providing me with the interesting topic and guiding me for the overall research and plan. Dr.Jian Chen for answering all my questions and making the completion of the project possible. Geng Yang, Liang Rong, Jue Shen, Xiao-Hong Sun in IPACK group for the discussion and valuable suggestions during the thesis work. My mother Xiu-Yun Zheng and my husband Ming-Li Cui for always supporting and encouraging me. i ABSTRACT This thesis proposes and demonstrates Time to Digital Converters (TDC) with high resolution realized in 65-nm digital CMOS. It is used as a phase detector in all digital PLL working with 5GHz DCO and 20MHz reference input for radio transmitters.Two kinds of high resolution TDC are designed on schematic level including Vernier TDC and parallel TDC. The Sensed Amplifier Flip Flop (SAFF) is implemented with less than 1ps sampling window to avoid metastability. The current starved delay elements are adopted in the TDC and the conversion resolution is equal to the difference of the delay time from these delay elements. Furthermore, the parallel TDC is realized on layout and finally achieves the resolution of 3ps meanwhile it consumes average power 442 µW with 1. 2V power supply. Measured integral nonlinearity and differential nonlinearity are 0. LSB and 0. 33LSB respectively. Keywords: All Digital PLL, Time to Digital Converter (TDC), Sensed Amplifier Flip Flop (SAFF), Current Starved, Vernier delay line ii Contents ACKNOWLEDGEMENTS †¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦. i LIST OF FIGURES†¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦.. iv LIST OF TABLES †¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦. 1. 2. Introduction †¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚ ¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦. 1 State of art †¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦ 4 2. 1 2. 2 2. 3 2. 4 3 Buffer delay line TDC†¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦.. 4 Inverter delay line TDC †¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦.. Vernier TDC †¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦. 5 Gated ring oscillator (GRO) TDC †¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦.. 6 System level design †¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦. 7 3. 1 3. 2 3. 3 3. 4 Goal †¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦ Vernier delay line TDC †¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦ 9 Parallel TDC †¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦.. 10 Performance comparison †¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦.. 11 4 Schematic design and simulation †¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦ 12 4. 1 Sense Amplifier Based Flip-Flop â € ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦. 2 Schematic design†¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦ 14 Sampling window simulation †¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦.. 16 4. 1. 1 4. 1. 2 4. 2 Vernier delay line TDC †¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦. 21 Delay cells †¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦ 21 Simulation results †¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦.. 5 4. 2. 1 4. 2. 2 4. 3 Parallel TDC †¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦.. †¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦ 28 Delay cells †¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦ 28 Simulation results †¦Ã¢â‚¬ ¦Ã¢â ‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦.. 30 4. 3. 1 4. 3. 2 5 Layout and post-simulation†¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦ 3 5. 1 5. 2 5. 3 Layout of SAFF and post-simulation †¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦.. 33 Layout of parallel TDC and post-simulation †¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦ 35 Comparison and analysis †¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã ¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦.. 38 6 7 8 Conclusion †¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦ 0 Future work †¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦.. 41 Reference †¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦Ã¢â‚¬ ¦.. 42 iii LIST OF FIGURES Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 Figure 11 Figure 12 Figure 13 Figure 14 Figure 15 Figure 16 Figure 17 Figure 18 Figure 19 Figure 20 Figure 21 Figure 22 Figure 23Figure 24 Figure 25 Figure 26 Figure 27 Figure 28 Figure 29 Figure 30 Figure 31 Figure 32 Figure 33 Figure 34 Figure 35 Figure 36 Figure 37 Figure 38 Figure 39 Figure 40 Figure 41 Figure 42 Figure 43 Figure 44 Figure 45 iv Effect of LO phase noise in transmitter Block diagram of the phase-domain ADPLL frequency synthesizer Retiming of the reference clock signal (FREF) Operating principle of time-to-digital converter Buffer delay line TDC Inverter delay line TDC Vernier delay line TDC Gated ring oscillator TDC Test bench for measuring rising/falling time of input of TDC Input and output of inverter Diagram of Vernier delay line TDC Timing of the interfaces of Vernier TDC Diagram of parallel TDC Timing of the interfaces o f parallel TDC Symmetric SAFF Schematic of SAFF Schematic of Sense Amplifier Schematic of symmetric SR latch Test bench of SAFF Normal Sampling Case Extreme case of sampling for setup time simulation Extreme case of sampling for hold time simulation Sampling window simulation Current starved delay element Schematic of Matched delay cell Schematic of delay cell 1 Schematic of delay cell 2 Schematic of Vernier delay line TDC Input of Vernier TDC (stop – start) = 0ps Input of Vernier TDC (stop – start) = 20ps Vernier TDC transfer function Vernier TDC linearity Monte Carlo simulation of the resolution for Vernier delay line TDC Delay cell in Parallel TDC Delay time Vs width of transistor T5 Schematic of Parallel TDC Input of parallel TDC (stop – start) = 0ps Input of parallel TDC (stop – start) = 20ps Parallel TDC transfer function Parallel TDC linearity Floor Plan of SAFF Layout of SAFF Post-simulation of sampling window Floor plan of Clock distribution Layo ut of parallel TDC Figure 46 Figure 47 Figure 48 Figure 49 Input of parallel TDC after layout (stop – start) = 0ps Input of parallel TDC after layout (stop – start) = 30ps Parallel TDC transfer function after layout Parallel TDC linearity after layout LIST OF TABLES Table 1 Table 2 Performance comparison between Vernier TDC and parallel TDC Comparison to previous work v 1.Introduction All digital phase locked loop (ADPLL) is employed as frequency synthesizer in radio frequency circuits to create a stable yet tunable local oscillator for transmitters and receivers due to its low power consumption and high integration level. It accepts some frequency reference (FREF) input signal of a very stable frequency of and then generates frequency output as commanded by frequency command word (FCW). The desired frequency of output signal is an FCW multiple of the reference frequency. For an ideal oscillator operating at all power is concentrated around , but the spectrum spreads i nto nearby frequencies in practical situation.This spreading is referred as phase noise which can cause interference in adjacent bands in transmitters and reduce selectivity in receivers [1]. Fig. 1. Effect of LO phase noise in transmitter [1] For example, shown as Fig. 1, when a noiseless receiver must detect a weak desired signal at frequency in the presence of a powerful nearby transmitter generating at frequency with substantial phase noise, the desired signal will be corrupted by phase noise tails of transmitter. Thus the modern radio communication systems require strict specifications about phase noise of synthesizers. In the ADPLL, the time to digital converter (TDC) serves as the phase frequency detector (PFD) meanwhile the digitally controlled Oscillator (DCO) replaces the VCO.The core module is DCO which deliberately avoids analog tuning voltage controls. The DCO is similar to a flip flop whose internal is analog but the analog nature does not propagate beyond the boundari es. Compared to the analog PLL, the loop filter can be implemented in a fully digital manner which will save a large amount of area and maintain low power consumption. 1 Fig. 2. Block diagram of the phase-domain ADPLL frequency synthesizer [2] Fig. 2 shows a type II ADPLL which includes two poles at zero frequency. It has better filtering capabilities of oscillator noise compared to type I ADPLL, leading to improvements in the overall phase noise performance. The ariable phase signal is determined by counting the number of rising clock transitions of the DCO oscillator clock. The reference phase signal is obtained by accumulating the Frequency Command Word (FCW) with every rising edge of the retimed Frequency Reference (FREF) clock. The sampled variable phase is subtracted from the reference phase in a synchronous arithmetic phase detector which is defined by = + ? [k] [2]. Fig. 3. Retiming of the reference clock signal (FREF) [3] 2 There are two asynchronous clock domains, FREF and CKV, and it is difficult to compare the two digital phase values physically at different time instances without facing the metastability problem.During frequency acquisition, their edge relationship is not known, and during phase lock, the edges will exhibit rotation if the fractional FCW is nonzero [1]. Therefore, it is imperative that the digital-word phase comparison should be performed in the same clock domain. This is achieved by retiming process which is performed by oversampling the FREF clock with CKV for synchronization purpose (fig. 3). The retimed clock, CKR is used to synchronize the internal ADPLL operations. However, the retiming process generates a fractional phase error in CKV cycles which is estimated by TDC [3]. The DCO produces phase noise at high frequency, while the TDC determines the in band noise floor [4].The noise contribution of TDC within the loop bandwidth at output of ADPLL is where denotes the delay time of a delay cell in the TDC chain, is the period of RF output and is the frequency of the reference clock [1]. The equation above indicates that a smaller leads to smaller quantization noise from TDC. As a result, the effort is devoted to achieve high resolution TDC in order to obtain low phase noise of ADPLL. Fig. 4. Operating principle of time-to-digital converter [5] Fig. 4 illustrates the principle of time-to-digital converter based on digital delay line. The start signal is delayed by delay elements and sampled by the arrival of the rising edge of stop signal.The sampling process which can be implemented by flip-flops freezes the state of delay line as the stop signal occurs. The outputs of flip-flop will be high value if the start signal passes the delay stages and the sampling process will generate low value if the delay stages have not been passed by start signal. As a result, the position of high to low transition in this thermometer code indicates how far the start signal can be propagated in the interval spanned by star t and stop signal. 3 2. State of art 2. 1 Buffer delay line TDC Fig. 5. Buffer delay line TDC [5] The start signal ripples along the buffer chain and flip-flops are connected to the outputs of buffers. On the arrival of stop signal the state of delay line is sampled by flip-flops.One of the obvious advantages of this TDC is that it can be implemented fully digital. Thus it is simple and compact. However, the resolution is relatively low since it is the delay of one buffer. 2. 2 Inverter delay line TDC Fig. 6. Inverter delay line TDC [5] The resolution in this TDC is the delay of one inverter which is doubled compared to buffers delay chain. In this case, the length of measurement intervals is not indicated by the position of high to low transition but by a phase change of the alternation of high to low sequence. Consequently, the rise and fall delay of inverter should be made equal which requires highly 4 match of the process.In addition, the resolution is still limited by technolog y and therefore not high enough in our application of ADPLL. 2. 3 Vernier TDC Fig. 7. Vernier delay line TDC [6] Vernier delay line TDC is capable of measuring time interval with sub-gate resolution. It consists of two delay lines which delay both start signal and stop signal. The delay in the first line is slightly larger than the delay in the second line. During the measurement, the start signal propagates along the first line and the stop signal occurs later. It seems like the stop signal is chasing start signal. In each stage, it catches up by = Delay1- Delay2 Therefore the resolution is dependent on the difference of two delay stages instead of one delay element.Although the Vernier delay line TDC improves the resolution effectively, the area and power consumption is increased dramatically as the dynamic range becomes larger due to that each stage costs two buffers and one flip-flop. Besides, the conversion time will be increased and in a result it might be not feasible to work in a system. 5 2. 4 Gated ring oscillator (GRO) TDC Fig. 8. Gated ring oscillator TDC [6] The GRO TDC could achieve large dynamic range with small number of delay elements. It measures the number of delay element transitions during measurement interval. By preserving the oscillator state at the end of the measurement interval [k? ], the quantization error [k? 1], from that measurement is also preserved. In fact, when the following measurement of [k? 1] is initiated, the previous quantization error is carried over as [k] = [k? 1]. This results in first-order noise shaping of the quantization error in the frequency domain. Apart from the quantization noise, according to the well-known barrel shift algorithm for dynamic element matching, GRO TDC structure realizes first order shaping of mismatch error [6]. Thus, we can expect that this architecture ideally achieve high resolution without calibration even in the presence of large mismatch. 6 3 System level design 3. 1 GoalThe proposed TDC is designed to work with a 5GHz DCO and a 20MHz reference input while the circuit is fabricated in 65nm IBM CMOS technology; the supply voltage is 1. 2V and development environment is Cadence 6. 1. 3. Fig. 9. Test bench for measuring rising/falling time of input of TDC In order to find out the rising/falling time of the input signal for TDC, the 5GHz sine wave signal which is the same as the output of DCO in ADPLL is put through the inverter with the smallest size and the rising/falling time of the output of inverter is measured (Fig. 9) . 7 Fig. 10. Input and output of inverter Rising/falling time = 16. 58ps. This value is applied to model the practical case of input signals for TDC.The purpose for putting the sinusoid signal generated from DCO passing through the smallest inverter is to model the worst case for TDC with weakest driving ability. As the system level simulation result of ADPLL presents, the dynamic range of TDC is 20ps. The converter resolution is required to be around 2ps meanwhile the power consumption should be kept as low as possible. Since in the application of this ADPLL, sub-gate resolution and small dynamic range are targeted, two kinds of topologies of TDC are proposed. One is Vernier delay line TDC and the other one is parallel TDC. The comparison of these two architectures is concluded and both of them are designed on schematic level. 8 3. 2 Vernier delay line TDCStart Matched delay cell1 EN EN_ Delay1 Delay1 Delay1 Start_ Matched delay cell1 D Q D_ CLK Delay1 D Q0 D_ CLK Delay1 Delay1 D Q26 D_ CLK Stop Fig. 11. Diagram of Vernier delay line TDC 200ps Matched delay cell2 Delay2 Delay2 Delay2 start 20ps stop enable Valid output 2ns TDC_output Fig. 12. Timing of the interfaces of Vernier TDC As the description about Vernier TDC before, the start signal and stop signal are propagated by two delay line with small delay difference each stage respectively. The clock gating technology controlled by enable signal is used to realize low p ower dissipation. The timing relationship of interfaces is described in Fig. 2 which indicates that enable signal should be set to high value half 9 cycle of start signal ahead of the stop rising edge and the conversion time is about 2ns. The delay time of each stage in TDC is about 60ps to 70ps and 27 stages are design to cover the whole dynamic range so that the conservative estimation of conversion time of TDC would be no more than 2ns. The next stage of TDC in ADPLL should sample the output when it is stable. Since the period of FREF is 50ns which means that the instance of measurement occur every 50ns, it is reasonable to adopt the method of serial conversion and prepare the valid output data after 2ns delay. 3. 3Parallel TDC Start Current Staved delay cell EN EN_ Start_ Current Starved delay cell D Q0 D_ CLK Stop Fig. 13. Diagram of parallel TDC Delay1 Delay2 Delay12 D Q1 D_ CLK D Q11 D_ CLK 10 200ps 20ps start stop enable Valid output 420ps TDC_output Fig. 14. Timing of the i nterfaces of parallel TDC Configuring the gates not in a chain but in parallel generates TDC depicted in Fig. 13. The start signal applied to all delay elements in parallel. On the rising of stop signal the outputs of all delay elements are sampled at the same time. Instead of propagating the differential start signal, stop signal is delayed to avoid differential mismatch problem.The delay cells connected to stop signal are sized for delays = 0+? ?N =? . The time difference between the delayed stop signal is quantized with a resolution The conversion results are available immediately after the rising of stop signal. 3. 4 Performance comparison Parallel TDC Parallel delay elements with gradually increasing propagation delays are simultaneously sampled on the arrival of stop signal. No loop structure feasible Sub-gate resolution Conversion time independent from resolution Susceptible to variations Not feasible to high dynamic range Careful layout design Vernier TDC Principle Start and stop signals propagate along two delay lines with slightly different delays.Loop structure Pros Loop structure possible Sub-gate resolution Modular structure High dynamic range possible with loop structure Differential delay lines Conversion time depends on measurement interval and resolution Cons Table1. Performance comparison between Vernier TDC and parallel TDC 11 4 Schematic design and simulation 4. 1 Sense Amplifier Based Flip-Flop Flip-Flops are critical to the performance of Time to Digital Converter due to the tight timing constraints and low power requirements. Metastability is a physical phenomenon that limits the performance of comparators and digital sampling elements, such as latches and flip-flops. It recognizes that it akes a nonzero amount of time from the start of a sampling event to determine the input level or state [15]. This resolution time gets exponentially larger if the input state change gets close to the sampling event. In the limit, if the input changes a t exactly the same time as the sampling event, it might theoretically take an infinite amount of time to resolve. During this time, the output can dwell in an illegal digital state somewhere between zero and one. However, this flip flop is supposed to be reused in ADPLL so that the metastable condition of the retimed reference clock CKR is not acceptable. One reason is that the metastability of any clock could introduce glitches and double clocking in the digital logic circuitry being driven.The other reason is that it is quite likely that within a certain metastability window between FREF and CKV, the clock to Q delay of the flip flop would have the potential to make CKR span multiple DCO clock periods. This amount of uncertainty is not acceptable for proper system operation [4]. For the application of TDC, due to that the metastability sampling window should be no larger than the high resolution to avoid bubbles in TDC code [7], sensed amplifier based flip-flop (SAFF) is chosen. 1 2 VDD MP1 MP2 MP3 MP4 MN3 VDD MN4 D MN1 MN5 MN2 D_ CLK MN6 Pulse Generator Symmetrical SR latch S_ S R VDD R_ MP7 MP8 MP5 MP6 MP9 Q MP10 Q_ MN9 MN10 MN7 MN11 MN12 MN8 Fig. 15. Symmetric SAFF The SAFF shown as Fig. 5 consists of sense amplifier in the first stage and SR latch in the second stage. The amplifier senses complementary differential inputs and produces monotonous transitions from high to low logic level on one of the outputs following the leading clock edge. The SR latch captures each transition and holds the state until the next leading clock arrives [8]. When CLK is low, S_ and R_ are charged to high level through MP1 and MP4 meanwhile MN6 is closed. If D is high, S_ will be discharged through MN3, MN1 and MN6 which is opened by clock leading edges. Accordingly, R_ is hold to high level and Q is high in this case. The additional transistor MN5 is used to provide the discharging patch to ground. For example, when 13 ata is changed as CLK is high which means D is low and D _ is high at this time, S_ would be charging to high level if there is no MN5. However, S_ could be discharged through MN3, MN5, MN2 and MN6 since MN5 provides another path to ground. Although SR latch is able to lock the state of outputs of sense amplifier, MN5 prevents potential charging caused by leakage current even after the input data is changed and therefore guarantee the stable outputs of flip-flop. The SR latch, as the output stage, is kind of symmetric topology with equivalent pull-up and pulldown transistors network. Q+ = S + R_ ·Q Q_+ = R + S_ ·Q_ In the equations above, Q represents a current sate and Q+ represents a future state after the transition of clock.Thus this circuit has equal delays of outputs and provides identical resolution of the rising and falling meta-stability of their input data. In addition, the data input capacitive loading is only one NMOS transistor and the interconnect capacitance parasitic is minimized. 4. 1. 1 Schematic design The basic pri nciples of the SAFF design are that the size of the input transistors should be small enough to minimize the load effect of SAFF and large enough to ensure the speed of it. The PMOS and NMOS networks should be matched and the sizes of transistors are adjusted to obtain equal delay of differential outputs. Fig. 16. Schematic of SAFF 14 Fig. 17. Schematic of Sense Amplifier Fig. 18. Schematic of symmetric SR latch 15 4. 1. 2 Sampling window simulation Fig. 19.Test bench of SAFF The ideal switch is used to initialize the output signal Q otherwise Q will be floating at the beginning of simulation which would result in unpredictable rising or falling edge at the beginning therefore make it difficult to measure a fixed number of signal transition edge. In the practical case, the initial value of inputs of flip flop is either zero or one. The simulation is performed by tuning the delay time of CLK in order to change the time interval between CLK and D/D_. There are several cases simulated to verify the timing constraints of SAFF including setup timing, hold timing and sample window. 1. Normal sampling 16 Fig. 20. Normal Sampling Case Data D changes from zero to one and then is sampled after it is stable for a while. The crossing point of Q and Q_ is around 600mV which means there are equal delay of clock to Q and clock to Q_ due to the symmetric topology of SAFF. 2.Setup time simulation Setup time is the minimum time prior to triggering edge of the clock pulse up to which the data should be kept stable at flip flop input so that data could be properly sampled. This is due to the input capacitance present at the input. It takes some time to charge to the particular logic level at the input. During the simulation, the input data is changing from low to high and high value is supposed to be sampled. Sweep the position of CLK to find out when SAFF cannot capture the correct data. 17 Fig. 21. Extreme case of sampling for setup time simulation The clock to Q delay is incre asing exponentially when input data is approaching the clock triggering edge.When the data comes later than clock edge for 15ps, the clock to Q delay is up to about 280ps shown in Fig. 21. If the data comes even later than this, the output of flip flop will enter into metastable state or will never output high value. 3. Hold time simulation Hold time is the minimum time after the clock edge up to which the data should be kept stable in order to trigger the flip flop at right voltage level. This is the time taken for the various switching elements to transit from saturation to cut off and vice versa. During the simulation, the input data is changing from high to low and high value is supposed to be sampled. Sweep the position of CLK to find out when SAFF cannot capture the correct data. 18 Fig. 22.Extreme case of sampling for hold time simulation The clock to Q delay is increasing exponentially if transition of input data from one to zero happens close to the clock edge. As long as t he data could keep stable long enough the flip flop is capable of recognizing it during limit time interval. The hold timing constraint is that data should be stable after the clock rising at least 16ps (Fig. 22) to guarantee flip-flop could sample the right value otherwise the flip flop will enter into illegal state or never output high value. 4. Sampling window 19 2. 9 2. 8 2. 7 2. 6 x 10 -10 Tclk-Q 2. 5 setup time 2. 4 2. 3 2. 2 2. 1 2 -0. 5 hold time 0 0. 5 1 1. 5 2 Tdata-clk 2. 5 3 3. 5 x 10 4 -11 Fig. 23. Sampling window simulationSampling window is defined as the time interval in which the flip-flop samples the data value. During the interval any change of data is prohibited in order to ensure robust and reliable operation [8]. The flip-flop delay increases as the signal approaches the point of setup and hold time violation until the flip-flop fails to capture the correct data [9] which is displayed in Fig. 23. Metastability is modeled in critical flip-flops by continuous ins pection of the timing relationship between the data input and clock pins and producing an unknown output on the data output pin if the delay to clock skew falls within the forbidden metastable window. Referring to Fig. 3, the metastable window is defined as an x-axis region such that the clock to Q delay on the y-axis is longer by a certain amount than the nominal clock to Q delay. For example, if the nominal clock to Q delay is 200ps when the data to clock timing is far from critical, the metastability window would be 15ps if one can tolerate clock to Q delay increase by 20ps. If one can tolerate a higher clock to Q delay increase of 30ps, the metastable window would drop to 6 ps. A question could be asked as to how far this window can extend. The limitation lies in the fact that for a tight data to clock skew, the noise or other statistical uncertainty, such as jitter, could arbitrarily resolve the output such that the input data is missed.Therefore, for a conventional definition of setup time, not only must the output be free of any metastable condition, but the input data have to be captured correctly. For this reason, the setup and hold times are conservatively defined in standard-cell libraries for an output delay increase of 10 or 20% over nominal. The specific nature of TDC vector capturing does not require this restrictive constraint. Here, any output-level resolution is satisfactory for proper operation as long as it is not metastable at the time of capture, and consequently, 20 the metastable window could be made arbitrarily small [1]. This SAFF demonstrates very narrow sampling window less than 1ps according to the simulation results. 4. 2Vernier delay line TDC There are several components in Vernier delay line TDC including inverter, SAFF, matched delay cell, delay cell 1 and delay cell 2 in which matched delay cell has the same circuit topology with other two delay cells except that it has enable control pins. 4. 2. 1 Delay cells There are severa l methods to implement delay elements. The most popular three methods for designing variable delay cells are shunt capacitor technique, current starved technique and variable transistor technique [10]. In this thesis project, current starved delay element is employed because of its simple structure and relatively wide delay range of regulation.Vdd VBP M4 M2 M6 Vdd in C M1 M5 out VBN M3 Fig. 24. Current starved delay element As can be seen from the Fig. 24, there are two inverters between input and output of this circuit. The charging and discharging currents of the output capacitance of the first inverter, composed of M1and M2, are controlled by the transistors M3 and M4. Charging and discharging currents depend on the bias voltage of M3 and M4 respectively. In this delay element, both rising and 21 falling edges of input signal can be controlled. By increasing/decreasing the effective on resistance of controlling transistor M3 and M4, the circuit delay can be increased /decreased.F ig. 25. Schematic of Matched delay cell As the enable signal is set to high level, the input signal will pass through this delay cell. The enable signal should be set to high level before the active edge of input signal comes. The differential start signal and stop signal passed through this delay cell to produce matched rising/falling edge signal for the next stage in TDC. With respect to design of the size of transistors, the input transistors of the delay cell should be relatively large to shield the load effect of SAFF meanwhile allow T5 to control the changing and discharging current through the capacitors of the first stage of inverter.The second stage of inverter should have enough driving ability for 5GHz input signals and therefore the sizes are specified large enough to withdraw sufficient current from power supply for transition. Due to that the differential signals are delayed, the delay cell is also required to have matched PMOS and NMOS networks to achieve equal delay time for rising or falling input signals. 22 Fig. 26. Schematic of delay cell 1 Fig. 27. Schematic of delay cell 2 23 The only difference between these two delay cells above is the size of transistor T5. The W/L ratio of T5 in delay cell 2 is a bit larger than delay cell 2 makes the delay of delay cell 2 is slightly shorter than delay cell 1. These two delay cells constitute two delay lines for Vernier TDC. Fig. 28.Schematic of Vernier delay line TDC This Vernier TDC includes 27 stages of delay cells for the reason that it should cover the dynamic range of 20ps and the additional offset value introduced by the setup timing of SAFF. The first dumpy stage of delay cell is used to match the differential input signals for the following delay lines so that the input signals for each stage are characterized with the same rising or falling time. As a result, the delay difference between each delay pair for start and stop signal is only dependent on the different size of transistors in the current starved delay cell. 24 4. 2. 2 Simulation results The input of Vernier TDC, the delay difference between the start and stop signal, is swept from 0 to 20ps.The resolution and linearity are calculated and analyzed by conversion results from TDC. Fig. 29. Input of Vernier TDC (stop – start) = 0ps Fig. 30. Input of Vernier TDC (stop – start) = 20ps 25 The offset value of this TDC is 8 observed from Fig. 29. The result shown in Fig. 30 indicates that the start signal has passed through 22 stages of delay cells as the input is 20ps. Resolution = (20ps – 0ps)/ (22 – 8) = 1. 43ps 25 20 Output of Vernier TDC (ps) 15 10 5 0 0 2 4 6 8 10 12 14 Input of Vernier TDC (ps) 16 18 20 Fig. 31. Vernier TDC transfer function 0. 6 0. 4 0. 2 DNL and INL [LSB] 0 -0. 2 -0. 4 -0. 6 -0. 8 -1 INL DNL 0 2 4 6 8 10 12 Input of Vernier TDC 14 16 18 20 Fig. 32. Vernier TDC linearity 26The Differential Non Linearity (DNL) is the deviation in the difference between two successiv e threshold points from 1LSB. Integral Non Linearity (INL) is the deviation of the actual output. Both of them are calculated and reported in Fig. 32. The maximum DNL is +0. 4LSB while the maximum INL is -0. 89LSB. The process (skew) parameter files in the model directory contain the definition of the statistical distributions that represent the main process variations for the technology. This gives designers the capability of testing their designs under many different process variations to ensure that their circuits perform as desired throughout the entire range of process specifications. This is a Monte Carlo approach to the checking of designs.While being the most accurate test, it can also be time consuming to run enough simulations to obtain a valid statistical sample. Fig. 33. Monte Carlo simulation of the resolution for Vernier delay line TDC When running Monte Carlo to include FET mismatch, BOTH the Spectre mismatch and process vary statements are active. This will turn on b oth process and mismatch variations. Spectre provides the unique capability of running process variations independent of mismatch variations. This capability is not supported for this release. The average resolution calculated by averaging the delay difference between two delay lines is around 1. 66ps. The average power over one period is 148. 1E-6 W.The maximum power consumption is about 3. 6mW and the conversion time is around 2ns which is in accordance with the interfacing time estimation in system level design. Since the enable signal closed the TDC after the conversion is completed, the start signal with high frequency is prohibited to propagate so as to eliminate the unnecessary transition of delay cells and in a result saving the power dissipation. 27 4. 3 4. 3. 1 Parallel TDC Delay cells In order to design a serial of delay cells with the equal difference of delay time used in parallel TDC, the size of the transistor in a current starved structure is swept. Fig. 34. Delay ce ll in Parallel TDC 28Fig. 35. Delay time Vs width of transistor T5 Unlike Vernier TDC, only stop signal is delayed by various delay cells in parallel TDC. Thus the control of rising edge required, and then the size of transistor T5 is adjusted. As can be seen from Fig. 34, the size of transistors M1, M2, M4 and M5 is basically determined by the load capacitance which refers to the CLK pin of SAFF in this situation. Transistor T5 should be much smaller than M2 so that the discharging current could be controlled by T5. As the size of T5 increases, the delay time becomes smaller which means the delay cell is faster. According to the parameter analysis result in Fig. 5, the size of T5 can be determined by selecting the size corresponding to the delay time with 2ps difference for a serial delay cells. Fig. 36. Schematic of Parallel TDC 29 As the analysis in system level design, the delay cells are sized for delays = 0 + ? ?N. The single stop signal is delayed in parallel TDC, therefore t he matched delay cell connected to differential start signal is used to cancel the 0 and offset value. 4. 3. 2 Simulation results Similarly to Vernier TDC simulation, the input of parallel TDC, the delay difference between the start and stop signal, is swept from 0 to 20ps. The resolution and linearity are calculated and analyzed by conversion results from TDC. Fig. 37.Input of parallel TDC (stop – start) = 0ps 30 Fig. 38. Input of parallel TDC (stop – start) = 20ps The offset value of this TDC is 1 observed from Fig. 37. The result shown in Fig. 38 indicates that the start signal has passed through 11 stages of delay cells as the input is 20ps. Resolution = (20ps – 0ps)/ (11 – 1) = 2ps. 20 18 16 Output of parallel TDC (ps) 14 12 10 8 6 4 2 0 0 2 4 6 8 10 12 14 Input of parallel TDC (ps) 16 18 20 Fig. 39. Parallel TDC transfer function 31 1 INL DNL DNL and INL [LSB] 0. 5 0 -0. 5 0 2 4 6 8 10 12 Input of parallel TDC 14 16 18 20 Fig. 40. Parallel TDC linea rity DNL and INL are calculated and reported in Fig. 40. The maximum DNL is +0. LSB while the maximum INL is 1LSB. The average power over one period is 87. 33E-6 W which is much smaller than Vernier TDC. The reason is that the clock gating technology controlled by enable signal eliminates the redundant transition of delay cells. As the system level design indicates, the parallel TDC only works for 420ps each period of stop signal because that the conversion is completed instantly due to the intrinsic characteristic of parallel TDC and therefore there is no power consumption during the rest time. Although the peak power consumption is approximately equivalent to Vernier TDC, the average power dissipation is decreased dramatically. 32 Layout and post-simulation 5. 1 Layout of SAFF and post-simulation For the layout of radio frequency circuit the interconnection parasitic will be a critical problem. In an audio application for instance parasitic will probably be a minor concern. Howeve r, the operation frequency of this circuit is 5GHz which means that the interconnection parasitic will influence the performance of circuit dramatically. To minimize this influence, we could move interconnections to higher metals and make the metals carry current rather than poly. Besides, the floor plan should be as compact as possible to optimize the parasitic and impedance of interconnections. GND T0Symmetric SR Latch T15 T14 T13 T8 T9 T5 T3 Q_ T1 T12 T10 T11 T7 Q T6 T4 T2 VDD T0 T2 T4 T3 T5 T9 T1 D T6 T7 D_ CLK T8 CLK GND Sensed Amplifier Fig. 41. Floor Plan of SAFF 33 There are several steps for floor plan. First step is to examine the size of transistors and split transistor size in a number of layout oriented fingers. Then identify the transistors than can be placed on the same stack according to the principles of using almost the same number of fingers per stack and put the transistors with common drain or source together. In the floor plan shown in Fig. 41, power line VDD i s reused by SR latch and sensed amplifier to make the connections compact.Fig. 42. Layout of SAFF 34 In the development environment of Cadence 6. 1. 3, Calibre is used for DRC and Assura is used to do LVS check and RCX. Post-simulation is then performed with av_extracted view. Fig. 43. Post-simulation of sampling window Compared to Fig. 23, Fig. 43 illustrates that the timing constraint point moved from 16ps to 29ps which will affect the offset value of TDC. In addition, the delay time from clock leading edge to output Q is increased. However, this SAFF after layout can be employed to avoid meta-stability effectively due to that the sampling window is still less than 1ps. 5. 2 Layout of parallel TDC and post-simulationIn this TDC system, the clock distribution network formed as a tree distributes the signal to all the delay cells. To reduce the clock uncertainty, the network requires highly matched topology showed as Fig. 44 below. 35 Clock Fig. 44. Floor plan of Clock distribution This kind of topology guarantees the equal delay from the common point clock to each element. Fig. 45. Layout of parallel TDC After DRC and LVS, the RC net list is extracted to do post-simulation. The input of parallel TDC after layout, the delay difference between the start and stop signal, is swept from 0 to 30ps. The resolution and linearity are calculated and analyzed by conversion results from TDC. Fig. 46.Input of parallel TDC after layout (stop – start) = 0ps 36 Fig. 47. Input of parallel TDC after layout (stop – start) = 30ps The offset value of this implemented TDC is 0 observed from Fig. 46. The result shown in Fig. 47 indicates that the start signal has passed through 10 stages of delay cells as the input is 30ps. Resolution = (30ps – 0ps)/ (10 – 0) = 3ps. 35 30 Output of parallel TDC after layout (ps) 25 20 15 10 5 0 0 5 10 15 20 Input of parallel TDC after layout (ps) 25 30 Fig. 48. Parallel TDC transfer function after layout 37 0. 5 0. 4 0. 3 DNL and INL after layout [LSB] 0. 2 0. 1 0 -0. 1 -0. 2 -0. 3 -0. 4 -0. 5 INL DNL 0 5 10 15 20 Input of parallel TDC (ps) 25 30 Fig. 49.Parallel TDC linearity after layout DNL and INL are calculated and reported in Fig. 49. The maximum DNL is 0. 33LSB while the maximum INL is 0. 5LSB. The average power over one period is 442. 1E-6 W. The maxim total current is about 3. 24mA. The peak power consumption is almost the same as the TDC before layout, but there are obvious ripples even the TDC is disabled due to that the parasitic capacitors increase the time for charging and discharging. 5. 3 Comparison and analysis Technique Parallel 2-level DL parallel Pseudo-diff DL VernierGRO CMOS [ µm] 0. 065 0. 35 0. 13 0. 09 0. 09 Supply [V] 1. 2 3 1. 2 1. 3 1. 2 Power [mW] 3. 89 50 2. 5 6. 9 4. 32 Resolution [ps] 3 24 12 17 6. 4 INL/DNL 0. 5/0. 3 -1. 5/0. 55 -1. 15/1 0. 7/0. 7 – Work This [12] [3] [7] [13] Table2. Comparison to previous work Table2 compares the proposed TDC to prior pub lished work in CMOS technology. This TDC features the fastest resolution with the best linearity. The power consumption is not directly comparable because the results from the other works are corresponding to different input range. However, it still indicates that this TDC consumes very low power due to that the start signal 38 only passes two buffers and the stop signal with low frequency is delayed. The TDC error has several components: quantization, linearity and randomness due to thermal effects.As can be seen from table5, the implemented TDC achieves medium linearity which can be improved if the layout is enhanced from floor plan considering the parasitic effects. With respect to quantization noise, the total noise power generated from this kind of TDC is spread uniformly over the span from dc to the Nyquist frequency without modulation. As a result, the proposed TDC contributes the lowest noise floor due to high resolution. = =3ps, , = 20MHz, we obtain = -104. 3 dBc/Hz. Banerj ee’s figure of merit (BFM) [14], being a 1-Hz normalized phase noise floor, is defined as BFM = where is a sampling frequency of the phase comparison and N= is the frequency division ratio of a PLL.It is used to compare the phase performance of PLLs with different reference frequencies and division ratios. In this TDC based ADPLL, BFM = -225. 3dB. Even though state-of-the-art conventional PLLs implemented in a SiGe process can outperform the ADPLL presented here in the in band phase noise, -213 dB in reference and -218 dB in reference, the worst case BFM of -205 dB appears adequate even for GSM applications, since there are no other significant phase-noise contributions as in the conventional PLLs [4]. However, the Gated Ring Oscillator TDC is able to push most of the noise to high frequency region which is then filtered by the loop filter in ADPLL through holding oscillation node state between measurements.The obvious drawback of this TDC is that the dynamic range is relativ ely small which will limit the application of it. Parallel TDC is not feasible to compose the loop structure so that the area and power dissipation will be increased dramatically if larger dynamic range is required. But the Vernier TDC designed in this thesis can be used in the loop structure for large dynamic range. 39 6 Conclusion In this thesis, two kinds of Time to Digital Converters are designed with Vernier and parallel structure on schematic level respectively. The performance of these two TDCs are concluded and compared. In the Vernier TDC, only two delay cells are designed and then reused to constitute two delay lines with slightly different delay time.This architecture is easy to implement and reduces the mismatch with delay cells. But the conversion time dependent on resolution and measurement interval time is relatively long since the signals are propagating along the delay cells in serial. On the other hand, in parallel TDC, the process of conversion is completed instan taneously due to that the signals are passing through the delay cells and then captured in parallel. Thus it has lower average power dissipation over one period. However, a set of delay cells are designed which obviously introduce nonlinearities. To minimize the mismatch problem, the single stop signal is delayed instead of two input signals for avoiding the differential mismatch situation.To sum up, both of the TDCs achieve sub-gate resolution which is able to meet the application requirements and Vernier TDC has higher resolution and better linearity but longer conversion time and larger power consumption compared to parallel TDC according to the simulation results. The parallel TDC is chosen to be implemented on layout. Comparing the results from schematic simulation and post-simulation, the performance is decreased on resolution, linearity and power consumption after layout. The major reason for this phenomenon is the parasitic capacitance of transistors and real wires which is a significant factor to affect the final properties in high frequency circuits.In the stage of schematic design, the sizes of transistors are not fully considered and results in difficulties on floor plan of layout. Specifically, the transistors are rather difficult to split into the same fingers per stack and therefore the floor plan is not compact enough to minimize the interconnections. Besides, the parasitic capacitance should have been emulated on schematic simulation in order to predict the effect after layout otherwise it would be very time consuming if the schematic design is modified after layout. In addition, the size of transistors is very small which makes them comparable to wire parasitic effects. Although small transistors are with smaller parasitic capacitance and less power consumption, they will more sensitive to layout mismatch.The function of the TDCs designed and implemented in the thesis is guaranteed for the application but the performance needs to be improved. The layout turns out to be an essential stage for the final characteristics of the circuits. With a more thoughtful design flow and sophisticated consideration for mismatch, the circuits after layout could maintain the performance as schematic level. 40 7 Future work There is plenty of more work to be done to improve the performance of TDC. Due to that the TDC is essential to the aggressive goal of phase noise from all digital PLL, other kinds of architectures of it are worth to try for the required resolution and dynamic range. Since the performance of circuit after layout is not identical with schematic, the size of transistors could be modified for layout oriented. To reduce the parasitic effects, layout should be improved from a better floor plan. Vernier TDC with higher resolution and better linearity could be implemented on layout which can tolerate first order PVT variation if two delay chains are well matched [11]. Although the Vernier TDC and parallel TDC achieve high reso lution, they have very low efficiency when measuring large time intervals, which requires extra hardware and power consumption. To overcome this limitation, a Vernier Ring TDC has been proposed recently.Unlike the conventional Vernier TDC, this novel TDC places the Vernier delay cells in a ring format such that the delay chains can be reused for measuring large time intervals. Digital logic monitors the number of laps the signals propagate along the rings. Arbiters are used to record the location where the lag signal catches up with the lead signal. The reuse of Vernier delay cells in a ring configuration achieves fine resolution and large detectable range simultaneously with small area and low power consumption [11]. This architecture of Vernier Ring TDC combines the Vernier delay lines and GRO topology is worth to implement for wide application. ? ? 41 8 [1] [2] [3] [4] [5] [6] [7]